Resonant Gate Tunneling Current in Double-Gate SOI: A Simulation Study
نویسندگان
چکیده
Gate tunneling current in fully depleted, double-gate (DG) silicon-on-insultor (SOI) MOSFETs is characterized based on quantummechanical principles. The gate tunneling current for symmetrical DG SOI with ground-plane ( =1.5 nm and =5 nm) is shown to be higher relative to single-gate (bulk) MOS structure. The tunneling is enhanced as the silicon layer becomes thinner since the thinner silicon layer acts a deep quantum well. The simulated – of DG SOI has negative differential resistance like that of the resonant tunnel diodes at the gate bias 1 4 V.
منابع مشابه
Implications of gate tunneling and quantum effects on compact modeling in the gate-channel stack
Simulation and modeling of gate tunneling current for thin-oxide MOSFETs and Double-Gate SOIs are discussed. Guidelines for design of leaky MOS capacitors are proposed. Resonant gate tunneling current in DG SOI is simulated, based on quantum-mechanical models, and shown to be an issue of growing concern.
متن کاملA fine-grained reconfigurable logic array based on double gate transistors
A fine-grained reconfigurable architecture based on double gate technology is presented. The logic function operating on the first gate of a double gate (DG) transistor is reconfigured by altering the bias on its second gate. A compact reconfigurable cell is proposed that merges two stacked 3-state resonant tunneling devices and non-silicon transistors and “hides” the cost of reconfiguration by...
متن کاملStudying the Impact of Gate Tunneling on Dynamic Behaviors of Partially-Depleted SOI CMOS Using BSIMPD
Abstract In this work, we investigate and analyze the impact of gate tunneling on dynamic behaviors of partially depleted SOI CMOS with the aid of the physically accurate BSIMPD model. We examine in particular the impact of gate tunneling on the history dependence of inverter delays. The examination reveals key requirements for capturing the history effect in SPICE modeling. This study suggests...
متن کاملImpact of Silicon Wafer Orientation on the Performance of Metal Source/Drain MOSFET in Nanoscale Regime: a Numerical Study
A comprehensive study of Schottky barrier MOSFET (SBMOSFET) scaling issue is performed to determine the role of wafer orientation and structural parameters on the performance of this device within Non-equilibrium Green's Function formalism. Quantum confinement increases the effective Schottky barrier height (SBH). (100) orientation provides lower effective Schottky barrier height in compa...
متن کاملUltrathin silicon-on-insulator vertical tunneling transistor
We have fabricated silicon-on-insulator ~SOI! transistors with an ultrathin Si channel of ;5 nm, tunneling gate oxide of ;1 nm, and 100 nm gate length. In addition to good transistor characteristics, these same devices exhibit additional functionality at low temperature. The drain current ID exhibits steps near the turn-on threshold voltage as a function of the backgate VBG bias on the substrat...
متن کامل